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cmos process

"cmos process"的翻译和解释

例句与用法

  • The specifications for the transceiver rf front - end are deduced from ieee 802 . 11b standard . then , the rf front - end is implemented in cmos process under the conditions of high integrity , low power and some design margin left
    根据ieee802 . 11b标准的规定,本论文推导出了对各模块的性能要求,并以提高集成度、降低功耗和保留适当的设计余量为原则,采用cmos工艺实现了各个模块。
  • An auto - adjustable charge pump embodied in a white led driver has been taped - out successfully using a 0 . 5 m cmos process . it can provide more than 80ma output current in the wide input voltage range from 2 . 7v to 5 . 5v
    此电荷泵芯片采用0 . 5 mcmos工艺;输入电压范围为2 . 7 5 . 5v ;可以提供大于80ma的输出电流,同时驱动四颗白光led ;并且此芯片具有根据输入电压自动选择工作模式的功能。
  • With the development toward sub - micron and deep sub - micron technologies , cmos will have extremely wide market prospects , because its low cost and easy of implementation . hence all the simulation of this paper uses the csmc 0 . 6 m standard cmos process
    标准cmos工艺作为数模混合集成电路的主流工艺,随着cmos技术的发展,具有广泛的市场前景,本文就是在在csmc0 . 6 m标准cmos工艺库下进行仿真的。
  • Sparse - tree architecture enables low carry - merge fan - outs and inter - stage wiring complexity . single - rail and semi - dynamic circuit improves operation speed . simulation results show that the proposed adder can operate at 485ps with power of 25 . 6mw in 0 . 18 - mu m cmos process
    具有代表性的并行前缀进位结构有kogge - stone树brent - kung树han - carlson树和knowles树等,一些高性能的加法器也由此被设计出来。
  • In this study , the design procedures for mitigating radiation effects mechanisms have been implemented in a gate array design , we have obtained samples of integrated circuits test structures manufactured by wuxi csmc - hj using their 0 . 6 - m cmos process
    在研究中,我们将降低辐射效应的设计方法应用到门阵列设计中,获得了华晶上华半导体有限公司采用0 . 6 m的cmos工艺生产的集成电路样片,具有100krad ( si )的抗总剂量辐射能力。
  • According to the specification and the scheme three architectures including a gmc ( transconductor capacitor ) filter , a sc ( switched capacitor ) filter and a si ( switched current ) filter are researched and implemented , simulated in 0 . 18m cmos process . the results are as expected
    根据系统要求及设计方案,分别研究并得到了跨导电容、开关电容和开关电流三种滤波器结构,采用0 . 18mcmos工艺进行仿真,其结果与预期的基本符合。
  • Mems optical switch for optical communication is fabrication by silicon surface micromachining technology . surface micromachining technique , based on the standard cmos processes , in the other hand , offers greater flexibility for realizing free - space optical systems on a single chip
    Mems光开关是采用表面微细机械加工技术制作而成,硅表面微机械加工技术是以cmos集成电路工艺为基础的,它可以灵活地把光开关集成在一块硅片上。
  • Based on the basic requirements and function of the displacement - load sensor , the design adopts single - chip 8 - bit microcontroller - p89c51rc2 manufactured in an advanced cmos process and belonged to the 80c51 microcontroller family to make the p89c51rc2 ’ s circuit less , simple and more reliable
    根据位移-载荷传感器功能和主要技术指标要求,采用高性能静态80c51设计的,带有非易失性flash的8位微处理器p89c51rc2作为传感器的核心控制器。
  • The proposed 64 bits high performance alu is optimized at algorithm level , logic level , circuit level and layout level , and is implemented in 0 . 18 m cmos process . furthermore , the testing technique of the alu is discussed . this thesis mainly contributes to the following aspect : 1
    文章从部件的算法、逻辑结构、电路参数、物理版图等多个层次进行设计优化,在0 . 18 mcmos工艺下实现了一款64位高性能算术逻辑部件,并对该部件的测试方法进行研究。
  • The dominance and properties of the cmos integrated reference were also described , and the research meaning was pointed out . related device theory and process model used in design were described . the temperature related model and the influencing factor of two active devices , subthreshold mosfet and pnp substrate transistor , based on cmos process were analyzed and compared , and pointed out that the pnp substrate transistor was more fit for being the temperature compensating device for bandgap reference
    阐述了设计中相关的器件理论与工艺模型,对cmos工艺下的两种有源器件,即亚阈值工作状态下的金属场效应晶体管( mosfet )及衬底pnp双极型晶体管( bjt )的温度模型及其影响因素进行了分析和比较,指明衬底pnp双极型晶体管更适合作为基准源的温度补偿元件。
  • 更多例句:  1  2  3  4
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